Performance Analysis of CNFET based Interconnect Drivers for Sub-threshold Circuits

Subthreshold VLSI circuits design received ample interest due to rapid growth of portable devices. The portable domain places in flexible limitation on the power dissipation. Though, device operating in subthreshold region shows huge potential towards satisfying the ultra low power requirement, it holds lots of difficult design issues. As integration density of interconnects increases at every technology node, increased delay and crosstalk effects may comes a more challenging design problem particularly for subthreshold interconnects. Nanometer subthreshold global interconnect faces subthreshold driver design challenges and problems due to increased interconnect capacitance. This paper examined use of CNFET based interconnect driver even for ultra low power circuits and compared the performance with Si-MOSFET based interconnect driver. It has been reported that CNFET driver provides 9.74 times lower EDP over Si-MOSFET based driver. It also reported better combination of number of tubes, inter CNT pitch and tube diameter for lower delay and EDP. General Terms Interconnect design